K. R. Surendra, Shaik Aaliya Sulthana, Suriboyina Mahitha, Shaik Iliyaj, Muli Ravindra Reddy, and Emmadi Manu, Trans., “Security Enhancement in Digital Circuits Using Probabilistic Delay Insertion and Timing Obfuscation”, Int J Sci Res Sci & Technol, vol. 13, no. 2, pp. 378–386, Mar. 2026, Accessed: Apr. 29, 2026. [Online]. Available: https://mail.ijsrst.com/index.php/home/article/view/IJSRST261337